Hi Sivaraj,
[PLLANDCLOCKCONFIG]
PLL0CFG0 = 0x00130001
PLL0CFG1 = 0x00000205
PERIPHCLKCFG = 0x000000B
PLL0CFG0 and PLL0CFG1 are derived from the numbers I used when creating the .bin file using the AISgen utility. This is the same configuration I use in my code when initializing the system.
Lines 43-59 of OMAP-L138.ini describes how PERIPHCLKCFG should be configured. Note that for SPI flash boot only the lowest eight bits are valid. Other boot modes I2C, UART, SD/MMC use more bits. PERIPHCLKCFG in my ini file is configured to boot from SPI, at least that's what I think I'm doing. The default ini is configured to boot from some other boot device.
[EMIF3DDR] similar to how PLL0CFG0 and PLL0CFG1 are configured, I use settings for PLL1 and the DDR interface that work on my system. Again tested using AISgen and in code.
Regards,
Dinesh